In semiconductor device manufacturing, suicides, which are alloys of silicon and metals, are often used. Silicides may be formed by the reaction of a refractory metal or a near-noble metal with silicon, and they are used in a variety of applications. For example, silicide may be used at the source/drain and/or gate area, or it may be used to construct a gate or local interconnect lines, as examples.
A salicide is a Self-ALigned suicide; the term salicide refers to a silicide formed by a self-aligning method. A salicide is typically formed by depositing a metal layer over a silicon layer, and then annealing the semiconductor structure. Where the metal is in contact with the silicon, a silicide is formed. Un-reacted metal is then selectively etched away, leaving the silicide automatically aligned to the underlying polysilicon layer; thus, it is referred to as a “salicide.” The terms “silicide” and “salicide” are used interchangeably herein.
Salicide materials are commonly used in advanced CMOS technology. Salicides reduce sheet resistance and contact resistance, which is particularly advantageous when a salicide is disposed over the source, drain and gate region of a transistor, as an example. Titanium salicide (TiSi2) has been used widely in CMOS technologies in the past. However, TiSi2 has a strong line-width dependency of low resistance phase (C54) formation, and a relatively high formation temperature. Therefore, there is a trend towards using cobalt salicide (CoSi2) rather than TiSi2 as a salicide material, particularly in smaller scale CMOS technologies, such as sub-quarter-micron feature sizes.
However, the formation of CoSi2 is challenging. Because cobalt does not reduce the amount of silicon surface oxide, as titanium does, the CoSi2 formation process is sensitive to the condition of the underlying silicon surface. CoSi2 formation is hindered or inhibited if there is a thick oxide layer disposed over the silicon surface. Also, while epitaxial CoSi2 may be formed on an oxide-free silicon surface, such a CoSi2 material formation tends to have {111} faceting, which increases junction leakage. The faceting occurs during epitaxial growth because of the cleaning process to prepare the surface such as an Argon sputter clean or HF dip clean without water rinse.
Another problem with CoSi2 formation being sensitive to the condition of the silicon surface is that the process window is limited for CoSi2 formation. As soon as the silicon surface is cleaned of any oxide, the oxide begins to regrow, for example. If oxide growth is too thick, a silicide cannot be formed, because there is no silicon at the surface to react with the metal. This leaves a very limited time window between surface clean and Co deposition for forming CoSi2.
What is needed in the art is an improved method of forming a CoSi2 salicide for semiconductor devices.